Welcome to the Ethernet POWERLINK - Made Easy project

This was a master thesis by Claus Stovgaard on University of Southern Denmark (SDU).
The purpose of the project was to implement EPL on Xilinx FPGA devices and use it as part of the SDU Vikings racing team.
Some of the highlights

• Custom made VHDL MAC layer created specific for EPL
• 3 port hub - allowing both star and bus topology
• NMT state machine in C, running on a MicroBlaze

For reference - see the public git archive - http://git.epl-me.org
The final reports are also available:

• Master thesis
• FORK report